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| Buffer PI6C2302 Reference Clock Signal V 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI6C2302 Phase-Locked Loop Clock Driver Product Features * 2X CLK_IN on CLK_OUT * High-Performance Phase-Locked-Loop Clock Distribution for Networking, ATM, 100/134 MHz Registered DIMM Synchronous DRAM modules for server/workstation/ PC applications * Zero Input-to-Output delay * Low jitter: Cycle-to-Cycle jitter 100ps max. * On-chip series damping resistor at clock output drivers for low noise and EMI reduction * Operates at 3.3V VCC * Wide range of Clock Frequencies * Package: Plastic 8-pin SOIC Package (W) Product Description The PI6C2302 features a low-skew, low-jitter, phase-locked loop (PLL) clock driver. By connecting the feedback CLK_OUT output to the feedback FB_IN input, the propagation delay from the CLK_IN input to any clock output will be nearly zero. The PI6C2302 provides 2X CLK_IN on CLK_OUT output. Application If the system designer needs more than 16 outputs with the features just described, using two or more zero-delay buffers such as PI6C2509Q, and PI6C2510Q, is likely to be impractical. The deviceto-device skew introduced can significantly reduce the performance. Pericom recommends the use of a zero-delay buffer and an eighteen output non-zero-delay buffer. As shown in Figure 1, this combination produces a zero-delay buffer with all the signal characteristics of the original zero-delay buffer, but with as many outputs as the non-zero-delay buffer part. For example, when combined with an eighteen output non-zero delay buffer, a system designer can create a seventeen-output zero-delay buffer. Logic Block Diagram Product Pin Configuration CLK_IN 1 2 3 4 8-Pin W 8 7 6 5 FB_IN VCC GND S CLK_IN FB_IN S /2 PLL CLK_OUT AVCC AGND CLK_OUT Control Input Feedback S 1 18 Output Output Source PLL CLK_IN PLL Shutdown N Y 0 17 Zero Delay CLK_OUT Non-Zero Delay Buffer Figure 1. This Combination Provides Zero-Delay Between the Reference Clocks Signal and 17 Outputs 1 PS8418B 05/21/01 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI6C2302 Phase-Locked Loop Clock Driver Pin Functions Pin Name CLK _IN AVCC AGND CLK _O UT S GND VCC FB_IN Pin Numbe r 1 2 3 4 5 6 7 8 Type I Power Ground O I Ground Power I Analog power. Analog ground. Clock output. The output provides low- skew copies of CLK _IN and has an embedded series- damping resistor. Control Input S. S is used to bypass the PLL for test purposes. When S is strapped to ground, PLL is bypassed and CLK _IN is buffered directly to the device outputs. Ground. Power supply. Feedback input. FB_IN provides the feedback signal to the internal PLL. D e s cription Reference Clock input. CLK _IN allows spread spectrum clock input Absolute Maximum Ratings (Over operating free-air temperature range, see Note 1) Symbol VI VO VI_DC IO_DC Power TSTG Input voltage range Output voltage range DC input voltage DC output current Maximum power dissipation at TA= 55 C in still air Storage temperature 65 o Parame te r M in. 0.5 0.5 0.5 M ax. VCC + 0.5 VCC + 0.5 +5.0 100 1.0 150 Units V mA W o C Note: 1. Stress beyond those listed under absolute maximum ratings may cause permanent damage to the device. Recommended Operating Conditions Symbol VCC VIH VIL VI TA Parame te r Supply voltage Supply voltage High level input voltage Low level input voltage Input voltage O perating free- air temperature O perating free- air temperature Commercial Industrial 0 0 40 Te mpe rature Commercial Industrial M in. 3.0 3.135 2.0 0.8 VCC 70 85 C M ax. 3.6 3.465 V Units 2 PS8418B 05/21/01 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI6C2302 Phase-Locked Loop Clock Driver Electrical Characteristics Symbol ICC CI CO IOH IOL (Over recommended operating free-air temperature range) Te s t Condition VI = VCC or GND; IO = 0(2) VI = VCC or GND; IO = VI = VCC or GND VO = VCC or GND VOUT = 2.4V VOUT = 2.0V VOUT = 0.8V VOUT = 0.55V 0(2) Te mpe rature Commercial Industrial VCC 3.6V 3.465V 3.3V M in. Typ. M ax. 10 10 Units A pF 4 6 18 30 25 17 mA Note: 2. Continuous Output Current AC Specifications Timing Requirements Symbol FCLOCK DCYI tp tj tr tf Parame te r Clock frequency Clock frequency Input clock duty cycle Stabilization time after power up Phase error without jitter(3) Jitter, cycle- to- cycle Duty cycle Rise- time, 0.4V to 2.0V Fall- time, 2.0V to 0.4V (Over recommended ranges of supply voltage and operating free-air temperature, CL = 25pF) Te s t Condition Commercial Industrial M in. 25 25 40 Typ. M ax. 134 100 60 1 +150 +100 55 Units MHz % ms ps % ns CLK _IN at 100MHz and 66MHz At 100MHz and 66MHz 150 100 45 1.0 1.1 Note: 3. This switching parameter is guaranteed by design. 3 PS8418B 05/21/01 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI6C2302 Phase-Locked Loop Clock Driver 8-pin Plastic SOIC (W) Package 8 .149 .157 3.78 3.99 .0099 .0196 0.25 x 45 0.50 1 .189 .196 .016 .026 0.406 0.660 REF 4.80 5.00 1.35 1.75 SEATING PLANE 0-8 .0075 .0098 0.40 .016 1.27 .050 0.19 0.25 .053 .068 .2284 .2440 5.80 6.20 .050 BSC 1.27 .013 0.330 .020 0.508 .0040 0.10 .0098 0.25 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Ordering Information Orde ring Code PI6C2302W PI6C2302- WI Package Name W8 W8 Package Type 8- pin 150- mil SOIC 8- pin 150- mil SOIC Ope rating Range Commercial Industrial Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com 4 PS8418B 05/21/01 |
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